2018 Low-Income Housing Tax Credit Results & Awards Overview

2018 Low-Income Housing Tax Credit Results & Awards Overview
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In 2018, Wisconsin allocated approximately $15.77 million in Low-Income Housing Tax Credits (LIHTC), with awards benefiting properties in various communities. The competitive process emphasized financial participation and credit usage points, leading to significant leverage. A total of 51 applications were submitted, resulting in 32 awards assisting in the development or rehabilitation of 1,766 residential units, including 1,583 affordable units. Milwaukee and Madison were prominent among the awarded communities, with a total investment exceeding $322 million across awarded projects.

  • Wisconsin
  • LIHTC
  • Affordable Housing
  • Tax Credits
  • Community Development

Uploaded on Feb 28, 2025 | 0 Views


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  1. Latest Update DPACC Use- cases https://docs.google.com/document/d/1eu2489SYeVL180ZzjnagrXT UM1Qh37GKs6N6rRYDVNM/edit 2/28/2025

  2. Table of Contents Update on the figures to align with dpacc arch. Introduction Acceleration Models: Lookaside Model, Offload Model (Inline Model), External Model (Data Path Offload Model) Virtualized Acceleration Interfaces: Passthrough-based Acceleration & Virtio-based Acceleration Virtio-lookaside Acceleration & virtio-inline acceleration Targeting Applications: SmallCell Gateway. IPSec between vRAN and vEPC, VRAN IPsec Packet Processing Acceleration NFVI Packet Processing Acceleration PDCP Packet Processing Acceleration Use-cases IPsec Look Aside Accelerator NFVI Packet Processing Offload Accelerator Combined NFVI Inline and IPsec LA Accelerator NFVI and IPsec Offload Accelerator PDCP Offload Accelerator vRAN application description refined.

  3. Update Summary Refine vRAN application statement revised S1 interface Updated virtio-lookaside figures Remove irrelevant technical details Be aligned with dpacc arch

  4. Targeting applications vRAN (LTE Stack illustration & Accelerator models) Look aside Look aside Inline (offload) Two types of look-aside accelerator identified 1. Added into Section 2.1 as examples; 2. Clarifications added in Section 4.3. One types of offload accelerator identified 1. Added into Section 2.2 as examples; 2. Clarifications added in Section 4.3.

  5. Targeting applications (revised S1 interface) vRAN (LTE Stack illustration & Accelerator models) Revised S1 interface Look aside Look aside Inline (offload) Two types of look-aside accelerator identified 1. Added into Section 2.1 as examples; 2. Clarifications added in Section 4.3. One types of offload accelerator identified 1. Added into Section 2.2 as examples; 2. Clarifications added in Section 4.3.

  6. Update Summary Refine vRAN application statement ??? Updated virtio-lookaside figures Remove irrelevant technical details Be aligned with dpacc arch

  7. Look Aside Accelerator v1 (updated) Virtio-Lookaside Acceleration 7 2025-02-28

  8. Look Aside Accelerator v2 (updated)

  9. IPSec Look Aside Accelerator (to be updated) VNF App IPsec App F1 Suggest to replace this box with a simple NFVI packet processing box , like the one used for crypto, IPSec or PME. App F2 g-API SAL To be updated according to the consensus reached based on the previous general figures. Virtio-IPsec Look-aside Frontend Virtio-net Frontend Virtio-net Frontend Vhost-net sio + Virtio sio-backend (vHost-user) Host kernel IPtables FW OVS DP VLAN/VxLAN Driver s-api SAL Acceleration Core Clear packet Encrypted IPSec g-driver packet hio IPsec Accelerator HW Physical ports Figure X IPsec Packet Processing Look Aside Accelerator Flow

  10. PDCP Look Aside Accelerator (to be updated) VNF - PDCP Application SAL SAL SAL guest virtio-net frontend virtio-net frontend virtio-la-pdcp frontend To be updated according to the consensus reached based on the previous general figures. sio sio sio To be aligned with the previous IPSec figure on ingress or outgress part or other processing functions in VNF. virtio-la-pdcp backend + vHost-user virtio-net backend virtio-net backend SAL host SW Accelerator hio hio hio device HW (NIC) HW Accelerator (Crypto) HW (NIC) Downlink Uplink Backplane Processing RLC/MAC/PHY Backhaul Processing GTPU/IPSec/QoS UE EPC 10 2025-02-28 Packet processing

  11. Todos Address remaining issues online Keep on working description of existing applications/use-cases Keep on working on other usecase figures Call for review and feedback Anything missing?

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