Addressing Modes 8086
Dive into the addressing modes, classifications of instructions, and architectural variances between the 8086 and 8088 processors. Explore data transfer methods, I/O port addressing modes, and differences in memory organization and data bus widths. Understand the distinct features like instruction queues and bus signals in each processor model.
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ADDRESSING MODES OF 8086 By: Ms. ZEENATH Asst.Prof Dept. Of ECE
Addressing modes for program memory 1. Intra segment direct(relative)mode: same segment ex: JMP NEXT 2. Intra segment indirect mode: ex: JMP CX 3. Inter segment direct mode : other segment Ex: JMP CONTINUE; 4. Inter segment indirect mode : IP is replaced with a pointed by SI . CS is replaced with a word pointer by SI+2 JMP DWORD PTR[SI]
Addressing modes for I/O ports Fixed port/direct port address Variable port /indirect port address
Classification of Instructions 1. Data transfer 2. Arithmetic transfer 3. Bit manipulation transfer 4. String transfer 5. Program execution transfer 6. Process control instruction
Data transfer General purpose byte/word transfer : Syntax: MOV Dest,s I/o port transfer: IN,OUT Flag transfer: LAHF(load lower byte of flag to AH) SAHF(store ),PUSHF,POPF Special address: LEA(load effective address),LDS(load data segment)
The architecture of 8088 is same as 8086 except for two changes (a)8088 has 4-byte instruction queue (b)8088 has 8-bit data bus
8086 The instruction Queue is 6 byte long. 8088 The instruction Queue is 4 byte long. In 8086, memory divides into two banks -even or lower bank -odd or higher bank The data bus of 8086 is 16-bit wide The memory in 8088 does not divide into two banks. The data bus of 8088 is 8-bit wide. It has BHE (bar) signal on pin no. 34 & there is no SSO (bar) signal. Control pin in 8086 is M/IO (bar). It does not have BHE (bar) signal on pin no. 34 & has only SSO (bar) signal. It has no S7 pin. Control pin in 8088 is IO/M (bar). It needs one machine cycle to R/W signal if it is at even location otherwise it needs two. In 8088, address bus; AD7-AD0buses are multiplexed. It needs one machine cycle to R/W signal if it is at even location otherwise it needs two. In 8086, all address & data Buses are multiplexed. It needs two IC 74343 for de-multiplexing AD0-AD19. It needs one IC 74343 for de-multiplexing AD0-AD7. Maximum supply current 360mA. Maximum supply current 340mA. Three clock speed: 5, 8, 10 MHz Two clock speed: 5, 8 MHz
