ARM Programming Overview and Toolchain Introduction

Review II D The AArch64 SLA 1 A64 SL Programmers Model A64 Self-hosted Debug A64 SL Memory Model A64 VMSA Performance Monitors A64 Generic Timer A64 System Register ARM201806 2025/6/10

ARM Programming 2 1 Toolchain Introduction 2 Assembly Module 3 Procedure Call Standard 4 Compiling Assembly Code 5 Compiling C/C++ Code 6 Summary ARM201806 2025/6/10

1 Toolchain Introduction 3 1.1 ARM Toolchain 1.2 GNU Toolchain ARM201806 2025/6/10

1.1 ARM Toolchain 4 ARM compiler toolchain comprises: armclang armasm armlink armar fromelf ARM201806 2025/6/10

armclang The armclang compiler and assembler. This compiles C/C++ code, and assembles GNU syntax assembly code. ARM201806 2025/6/10 5

armasm The legacy assembler. Assembles ARM syntax assembly code. ARM201806 2025/6/10 6

armlink The linker. Combines the contents of object files with object libraries to produce an executable program. ARM201806 2025/6/10 7

armar The librarian. Enables sets of ELF object files to be maintained in archives or libraries. Can be used for linking or distribution. ARM201806 2025/6/10 8

fromelf The image conversion utility. Can also generate textual information about the input image, such as disassembly and its code and data size. ARM201806 2025/6/10 9

1.2 GNU Toolchain 10 arm-linux-g++ .cpp arm-linux-gcc .c, .s arm-linux-objdump .o .s ARM201806 2025/6/10

2 Assembly Module 11 2.1 ARM Assembly Module 2.2 GNU Assembly Module ARM201806 2025/6/10

2.1 ARM Assembly Module 12 2.1.1 Assembly line 2.1.2 Assembly module ARM201806 2025/6/10

2.1.1 Assembly line 13 ARM201806 2025/6/10

{symbol} {instruction|directive|pseudo} {;comment} 14 All three sections of the source line are optional. Instruction mnemonics, pseudo-instructions, directives, and symbolic register names can be written in all uppercase or all lowercase, but not mixed. Labels and comments can be in uppercase or lowercase, or mixed. ARM201806 2025/6/10

{symbol} {instruction|directive|pseudo} {;comment} 15 symbol is usually a label. symbol must begin in the first column. ARM201806 2025/6/10

{symbol} {instruction|directive|pseudo} {;comment} 16 Instructions, pseudo-instructions, and directives must be preceded by white space, such as a space or a tab, irrespective of whether there is a preceding label or not. ARM201806 2025/6/10

{symbol} {instruction|directive|pseudo} {;comment} 17 Comment is the final part of a source line. The first semicolon on a line marks the beginning of a comment except where the semicolon appears inside a string literal. ARM201806 2025/6/10

Example 18 ARM201806 2025/6/10

2.1.2 Assembly module 19 The constituent parts of these examples are: ELF sections (defined by AREA directive) Application entry (defined by ENTRY directive). Application execution. Application termination. Program end (defined by END directive). ARM201806 2025/6/10

An example A64 assembly module 20 ARM201806 2025/6/10

An example A32 assembly module 21 ARM201806 2025/6/10

2.2 GNU Assembly Module 22 GNU Assembly Modules are similar to that of ARM, but have a number of differences. For example, GNU syntax identifies labels by the presence of a colon, while ARM syntax identifies labels by their position at the start of a line. ARM201806 2025/6/10

An example GNU assembly module 23 .text main: stp x4, x5, [SP], #-16 str x30, [SP], #-8 mov x4,#8 mov x5,#6 add x0,x4,x5 ret ARM201806 2025/6/10

3 Procedure Call Standard 24 3.1 Machine Registers 3.2 Processes, Memory & Stack 3.3 Subroutine Calls 3.4 Parameter Passing 3.5 Result Return 3.6 Interworking ARM201806 2025/6/10

3.1 Machine Registers 25 GPRs (x0-x7) and SIMD/FP registers v0-v7 are used to pass argument values into a subroutine and to return result values from a function. argument values x0-x7 v0-v7 Sub Routine Main Program result values ARM201806 2025/6/10

3.2 Processes, Memory & Stack 26 The memory of a process includes: code static data read-only static data writable static data: Initialized, zero-initialized & uninitialized heap for the creation of dynamic data objects for example, with the C malloc() function stack for local variables and arguments to subroutines is full-descending, with register SP ARM201806 2025/6/10

code static data main memory process memory heap sp stack ARM201806 2025/6/10 27

3.3 Subroutine Calls 28 BL instruction performs branch-with link. RET instruction is used for subroutine return. GPRs (x0-x7) and SIMD/FP registers v0-v7 are used to pass argument values into a subroutine and to return result values from a function. More arguments and return values can use stack. ARM201806 2025/6/10

4 Compiling Assembly Code 29 ARM compiler toolchain can assemble both GNU and ARM syntax assembly code GNU compiler toolchain can assemble only GNU syntax assembly code ARM201806 2025/6/10

armasm --cpu=8-A.64 -o file.o file.s ARM201806 2025/6/10 30

armclang -c -o file.o file.s arm-linux-gcc -o file.o file.s ARM201806 2025/6/10 31

5 Compiling C/C++ Code 32 5.1 Using inline assembly code 5.2 Using the volatile keyword ARM201806 2025/6/10

5.1 Using inline assembly code 33 The compiler provides an inline assembler for optimized assembly language routines, and to access features of the target processor not available from C or C++ Inline assembler supports: Inline assembly Assembly labels ARM201806 2025/6/10

Inline assembly 34 The general form of inline assembly statement is: __asm(code [: out [: in [: clobbered]]]); ARM201806 2025/6/10

ARM201806 2025/6/10 35

__asm(code [: out [: in [: clobbered]]]); 36 _ _ ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 37 __asm keyword can incorporate inline GCC syntax assembly code into a function. The inline assembler does not support legacy assembly code written in ARM assembler syntax. ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 38 ( ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 39 code is the assembly code. In this example, this is: "ADD %[result], %[input_i], %[input_j]" " " % [ ] %[ ] ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 40 : ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 41 output_operand_list is an optional list of output operands, separated by commas. Each operand consists of a symbolic name in square brackets, a constraint string, and a C expression in parentheses. In this example, there is a single output operand: [result] "=r" (res) ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 42 : ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 43 input_operand_list is an optional list of input operands, separated by commas. Input operands use the same syntax as output operands. In this example there are two input operands: [input_i] "r" (i), [input_j] "r" (j) ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 44 : ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 45 clobbered_register_list is an optional list of clobbered registers. In this example, this is omitted. ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 46 ) ARM201806 2025/6/10

__asm(code [: out [: in [: clobbered]]]); 47 ; ARM201806 2025/6/10

ARM201806 2025/6/10 48

Assembly labels 49 __asm__ keyword can specify an assembly label for a C symbol. For example: int count __asm__("count_v1"); // export count_v1, not count ARM201806 2025/6/10

int count __asm__("count_v1"); 50 int ARM201806 2025/6/10