Comparison of 8086, 80386, and i7 Architectures
This comparison highlights the architectural differences between the 8086, 80386, and i7 processors, covering aspects such as speed, memory capacity, technology, operating modes, additional features, register sets, and more.
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Presentation Transcript
Differences of 8086,80386,i7 Architecture and Pin Diagram Parameter 8086 80386DX i7 Year June 1978 October 1985 November 2008 No of Cores 1 1 4 Architecture 16bit 32bit 64bit Speed 5,8,10 MHz 16,20,25,33 MHz 2.66,2.80,2.93,3.06,3 .20 GHz 64/32bit Address Bus 20bit 32bit Data Bus 16bit 32bit 64bit Operating Voltage 5V 5V 1.4V Addressable memory Physical Memory 1MB 4GB 64GB 1MB 4GB 64GB Virtual Memory 1MB 64TB 240bytes
Differences of 8086,80386,i7 Architecture and Pin Diagram Parameter 8086 80386 i7 Register Size 16 bit 32 bit 64 bit Instruction Queue Size Pins available 6 bytes 16 bytes 18 entries 40 pin DIP package 132 pins 1366 pins Technology HMOS CHMOS II Bi-CMOS Pipeline Capability Yes Yes Yes Instruction set Supports 8086,386 and SIMD instructions 3 level cache per core L1(32KB), L2(256KB),L3(8MB ) Nehalem 117 Instructions 129 Instructions On chip cache -- -- Support for micro- architecture Power management -- -- Yes Yes Yes
Differences of 8086,80386,i7 Architecture and Pin Diagram Parameter 8086 80386 i7 Operating Modes 1) Maximum Mode 2) Minimum Mode 1) Real Mode 2) Protected Mode 3) Virtual 8086 Mode 1) Compatibility Mode 2) 64 bit Mode Memory Models 1) Flat Memory 2) Real Address mode 1) Flat memory 2) Segmented Memory 3) Real Address Mode No 1) Flat memory 2) Segmented Memory 3) Real Address Mode Yes On chip FPU No Superscalar No No Yes Branch Prediction Overclocking Feature Multiprocessor Support Latency No No Yes No No Yes No No Yes 4 6 15 Use Portable computing Desktops Desktops, Laptops
Differences of 8086,80386,i7 Additional Features 1. 80386 Architectural support for memory management Virtual addressing Segmentation and Paging Protection Mechanism Multitasking 2. i7 Intel Quick Path interconnect(QPI) Intel Turbo Boost Technology Smart Cache Intel virtualization Technology Hyper-threading support MMX instruction Set
Differences of 8086,80386,i7 Register Set Parameter 8086 80386DX i7 General Purpose Registers 8 GPRS of 16 bit 8 GPRS of 32 bit 16 GPRS of 64 bit Instruction Pointer IP of 16 bit EIP of 32 bit RIP of 64 bit Segment Registers 4 of 16 bit 6 of 16 bit 6 of 16 bit Stack Pointer 16 bit 32 bit 64 bit Flag Register Flag Register of 16 bit EFlags Register of 32 bit RFlags Register of 64 bit Control Register -- 32 bit 64 bit Debug Register -- 32 bit 64 bit Descriptor Table Register -- GDTR : 48 bits IDTR : 48 bits LDTR : 16 bits TR : 16 bits Selector : 16 bits GDTR : 80 bits IDTR : 80 bits LDTR : 16 bits TR : 16 bits Selector : 16 bits
Differences of 8086,80386,i7 Register Set Parameter FPU Registers 8086 -- 80386DX -- i7 8 Data Registers of 80 bits Status Register of 16 bits Control Register of 16 bits Opcode register of 11 bits IP register of 64 bits Data pointer register of 64 bit Tag register of 16 bits 8 MMX Register of 64 bits 16 XMM Register of 128 bits MXCSR Register of 32 bits MMX Register -- --
