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Research in Compilers and Introduction to Loop Transformations Part I: Compiler Research Tomofumi Yuki EJCP 2017 June 29, Toulouse
Background Defended Ph.D. in C.S. on October 2012 Colorado State University Advisor: Dr. Sanjay Rajopadhye Currently Inria Charg de Recherche Bretagne-Atlantique, Rennes, CAIRN team Optimizing compiler + programming language static analysis (polyhedral model) parallel programming models High-Level Synthesis EJCP 2017, June 29, Toulouse 2
What is this Course About? Research in compilers a bit about compiler itself Understand compiler research what are the problems? Be able to (partially) understand work by compiler people at conferences. what are the techniques? what are the applications? may be do research in compilers later on! EJCP 2017, June 29, Toulouse 3
Compiler Advances Old compiler vs recent compiler modern architecture gcc -O3 vs gcc -O0 How much speedup by compiler alone after 45 years of research? EJCP 2017, June 29, Toulouse 4
Proebstings Law Compiler Advances Double Computing Power Every 18 Years http://proebsting.cs.arizona.edu/law.html Someone actually tried it: On Proebsting s Law, Kevin Scott, 2001 SPEC95, compared against O0 3.3x for int HW gives 60%/year 8.1x for float EJCP 2017, June 29, Toulouse 5
Compiler Advances Old compiler vs recent compiler modern architecture gcc -O3 vs gcc -O0 3~8x difference after 45 years Not so much? EJCP 2017, June 29, Toulouse 6
Compiler Advances Old compiler vs recent compiler modern architecture gcc -O3 vs gcc -O0 3~8x difference after 45 years Not so much? The most remarkable accomplishment by far of the compiler field is the widespread use of high- level languages. by Mary Hall, David Padua, and Keshav Pingali [Compiler Research: The Next 50 Years, 2009] EJCP 2017, June 29, Toulouse 7
Earlier Accomplishments Getting efficient assembly register allocation instruction scheduling ... High-level language features object-orientation dynamic types automated memory management ... EJCP 2017, June 29, Toulouse 8
What is Left? Parallelism multi-cores, GPUs, ... language features for parallelism Security/Reliability verification certified compilers Power/Energy data movement voltage scaling EJCP 2017, June 29, Toulouse 9
Agenda for today Part I: What is Compiler Research? Part II: Compiler Optimizations Lab: Introduction to Loop Transformations EJCP 2017, June 29, Toulouse 10
What is a Compiler? Bridge between source and target target source compile EJCP 2017, June 29, Toulouse 11
Compiler vs Assembler What are the differences? target source compile object assembly assemble EJCP 2017, June 29, Toulouse 12
Compiler vs Assembler Compiler Many possible targets (semi-portable) Many decisions are taken Assembler Specialized output (non-portable) Usually a translation EJCP 2017, June 29, Toulouse 13
Goals of the Compiler Higher abstraction No more writing assemblies! enables language features loops, functions, classes, aspects, ... Performance while increasing productivity speed, space, energy, ... compiler optimizations EJCP 2017, June 29, Toulouse 14
Productivity vs Performance Higher Abstraction Less Performance Python Java Abstraction C Fortran Assembly Performance EJCP 2017, June 29, Toulouse 15
Productivity vs Performance How much can you regain? Python Python Java Java Abstraction C C Fortran Fortran Assembly Performance EJCP 2017, June 29, Toulouse 16
Productivity vs Performance How sloppy can you write code? Python Python Java Java Abstraction C C Fortran Fortran Assembly Performance EJCP 2017, June 29, Toulouse 17
Compiler Research Branch of Programming Languages Program Analysis, Transformations Formal Semantics Type Theory Runtime Systems Compilers ... EJCP 2017, June 29, Toulouse 18
New HW Needs New Compiler New Architecture IBM Cell, GPU, Xeon-Phi, Kalray MPPA, ... which ones succeeded? Good prog. model and compiler easier to fully utilize new HW crucial for success HW vendors invest a lot into compilers EJCP 2017, June 29, Toulouse 19
Examples Two classical compiler optimizations register allocation instruction scheduling EJCP 2017, June 29, Toulouse 20
Case 1: Register Allocation Classical optimization problem 3 registers 8 instructions 2 registers 6 instructions C = A + B; D = B + C; na ve translation smart compilation load %r1, A load %r2, B add %r3, %r1, %r2 store %r3, C load %r1, B load %r2, C add %r3, %r1, %r2 store %r3, D load %r1, A load %r2, B add %r1, %r1, %r2 store %r1, C add %r1, %r2, %r1 store %r1, D EJCP 2017, June 29, Toulouse 21
Register Allocation in 5min. Often viewed as graph coloring a b c d a b b c = a + b; d = b + c; c d add %r1, %r1, %r2 add %r1, %r2, %r1 Interference Graph Live Range Analysis Live Range: when a value is in use Interference: both values are in use e.g., two operands of an instruction Coloring: conflicting nodes to different reg. EJCP 2017, June 29, Toulouse 22
Register Allocation in 5min. Registers are limited a b c d x y a a b b c = a + b; d = b + c; x = c + d; y = a + x; c c d d x x y y Live Range Splitting a b c d x y z a = load A; c = a + b; d = b + c; x = c + d; z = load A; y = z + x; a a b b c c d d x x z z EJCP 2017, June 29, Toulouse 23 23
Research in Register Allocation How to do a good allocation which variables to split Solved which values to spill How to do it fast? Graph-coloring is expensive Just-in-Time compilation EJCP 2017, June 29, Toulouse 24
Case 2: Instruction Scheduling Another classical problem X = A * B * C; Y = D * E * F; na ve translation smart compilation R = A * B; X = R * C; S = D * E; Y = S * F; R = A * B; S = D * E; X = R * C; Y = S * F; Pipeline Stall (if mult. takes 2 cycles) Also done in hardware (out-of-order) EJCP 2017, June 29, Toulouse 25
Research in Instruction Scheduling Not much anymore for speed/parallelism beaten to death hardware does it for you Remains interesting in specific contexts faster methods for JIT energy optimization predictable execution in-order cores, VLIW, etc. EJCP 2017, June 29, Toulouse 27
Case 1+2: Phase Ordering Yet another classical problem practically no solution Given optimization A and B A after B vs A before B which order is better? can you solve the problem globally? Parallelism requires more memory trade-off: register pressure vs parallelism EJCP 2017, June 29, Toulouse 28
Job Market Where do they work at? Intel / IBM Research Apple Mathworks amazon Xilinx Many opportunities in France Mathworks @ Grenoble Many start-ups EJCP 2017, June 29, Toulouse 29
