IBERT Testing Update at Lawrence Berkeley National Laboratory
This update focuses on implementing IBERT signal integrity testing for RD53 chips at Lawrence Berkeley National Laboratory. The project involves creating eye diagrams, testing with commercial FPGA gigabit transceivers, and syncing clock frequencies for AUX output to meet RD53 tolerances.
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Presentation Transcript
IBERT Testing Update Japnidh Thakral Lawrence Berkeley National Laboratory SULI Internship under Maurice Garcia-Sciveres, Timon Heim, and Zhicai Zhang
Preface Look to implement IBERT signal integrity testing for the RD53 chips to create eye diagrams Implement on FPGA board at LBNL remotely Top level program consists of three blocks Block RAM (BRAM): targeted area in RAM to store up to 32-bit sequences for transmission Serializer: serializes the instructions to RD53 with continuous output IBERT: receives RD53 transmission in the form of pseudo-random bit streams (PRBS) to be used to create scans Mimas A7 FPGA AUX BRAM Serializer RD53 IBERT RX Eye diagrams Remote IBERT 2
Updates Started initial remote tests with Zhicai s help Remote IBERT test on commercial FPGA gigabit transceivers (self-test) successful Testing program with BRAM, Serializer, and IBERT coded with ILA debugger for live feedback Currently testing AUX output with a clock to meet the RD53 tolerances and to sync with the chip frequencies Remote IBERT 3
AUX Testing Having the clock from the AUX output match the chip frequencies will have the RD53 output an idle signal made of scrambled bits much like PRBS Using on board 100 MHz CMOS clock with a PLL to generate 80 MHz or 160 MHz to match the chip Needs to be within the voltage tolerance of 1.2 V max (currently at 1.5 V DC offset with a ~ 1V swing) Displayport RX schematics Image from Scope (Zhicai) Remote IBERT 4
To-do Finish matching the output specification of the AUX to the RD53 Run initial signal tests on the scrambled RD53 signal once the output is matched Program the commercial FPGA to output instructions via the AUX and have the RX lanes be used for IBERT simultaneously Remote IBERT 5
