IEEE 802.11-19/1921-00-00be Multi-Link Architecture Overview
Delve into the detailed architecture of multi-link capabilities in IEEE 802.11-19/1921-00-00be, focusing on packet level aggregation, high MAC, low MAC components, and transparent device operations. Enhance your understanding of traffic distribution, load balancing, security mechanisms, and link-based block acknowledgement. Explore the efficient management and handling of multi-link packet numbers for peak throughput and improved network performance.
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Nov. 2019 doc.: IEEE 802.11-19/1921-00-00be Multi-link Architecture Date: 2019-11-11 Authors: Name Affiliations Address Phone email Ming Gan ming.gan@huawei.com Yunbo Li Jian Yu Dandan Liang Huawei Wei Lin Technologies, Co. LTD. Guogang Huang Xun Yang Yuchen Guo Yiqing Li Osama Yan Xin Huawei Canada Edward Submission Slide 1 Ming Gan, Huawei
Nov. 2019 doc.: IEEE 802.11-19/1921-00-00be Background Two configurations for multi-link were proposed in [1] Packet level aggregation Flow level aggregation Packet level aggregation is much more promising compared with flow level aggregation Increases the peak throughput by enabling simultaneous operations in different links Dynamic load balance Improves the robustness and latency performance by duplicate transmission or the same traffic transmission over more than one link and so on In this work, we just show our opinion on the architecture for packet level aggregation Try to reuse the existing PHY and MAC Note: here the device which supports packet level aggregation is called multi-link capable transparent device in the following slides Submission Slide 2 Ming Gan, Huawei
Nov. 2019 doc.: IEEE 802.11-19/1921-00-00be Multi-link Capable Transparent Device Architecture Single MAC SAP For the multi-link capable transparent device, it has a shared high MAC and a few independent low MAC and PHY components Exposes a single MAC SAP to the upper layer In the high MAC, may perform multi-link management, such association authentication High MAC Common Queues Multilink Management Traffic Steering Low MAC 1 Low MAC 2 At the transmitter side Distribute the traffic to each low MAC, perform load balancing Assign a multi-link packet number to a received packets from the upper layer Each low MAC is able to perform independent EDCA CCA sounding, may perform security mechanism May maintain the sequence number assignment for link based block acknowledgement as well as link specific MAC processing Buffer Queues Buffer Queues EDCAF EDCAF PHY 1 PHY 2 TX 2 TX 1 Submission Slide 3 Ming Gan, Huawei
Nov. 2019 doc.: IEEE 802.11-19/1921-00-00be Multi-link Capable Transparent Device Architecture Single MAC SAP At the receiver side Collect the packets from the multiple links Perform buffer reordering based on the multi-link packet number, and send them to the upper layer in the order Perform link-based block acknowledgement based on its own scoreboard High MAC Reordering Buffer Multilink Management Common Queues Low MAC 1 Low MAC 2 Multi-link packet number was assigned for each packet in the high MAC [1] and [2] Only needed by high MAC layer Used for buffer ordering Bigger space size than the sequence number, and needs additional signaling (maybe zero overhead) RX Buffer RX Buffer Scoreboard Scoreboard PHY 1 PHY 2 RX 2 RX 1 Submission Slide 4 Ming Gan, Huawei
Nov. 2019 doc.: IEEE 802.11-19/1921-00-00be References [1] IEEE 802.11-19/0823r2 Multi-link aggregation [2] IEEE 802.11-19/1575r0 Multi-link BA operation Submission Slide 5 Ming Gan, Huawei
