Low-Cost PLL or Clock Generator Replacement Solutions for MB15F63UL
Are you seeking a cost-effective alternative to the Cypress MB15F63UL for your customer? Explore solutions using CDCM6208, CDCM61001, and CDCI6214 to achieve the desired output frequencies. Learn about addressing input frequency requirements, output frequency constraints, and cost considerations efficiently.
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Presentation Transcript
Background My Customer is looking for replacement of MB15F63UL (Cypress). http://www.cypress.com/file/242116/download
Customers goal Looking for low cost PLL or clock generator in place of MB15F63UL ( IF block only in the previous page) Vcc= 3.3V Input 26MHz ( or 25MHz) TCXO Output frequency 1) 276.35MHz 2) 369.95MHz Require C/N > 80~ 90dB/Hz at center frequency at offset=1kHz Low cost ( lower price ;1chip (2ch) or 2 chip)
Solution 1 My idea for Solution 1 CDCM6208 26MHz (or 25MHz) 276.35MHz 1:2 369.95MHz Solution 2 My idea for Solution 2A CDCM61001 2-A 26MHz (or 25MHz) 369.95MHz 1:1 2-B My idea for Solution 2B CDCI6214 26MHz (or 25MHz) 276.35MHz 1:1
Question 1 In case CDCM61001, 24+199/300 MHz input are necessary for output is 369.95MHz . Does it mean 24+0.663333..MHz = 24.663333MHz? Question 2 In case CDCM61001, I could not have 276.35MHz in Webench. (Clock tree builder alert) .May be too low output frequency? On the other hand, in case CDCI6214 , I could not have 369.95MHz (Clock tree builder alert).. May be too high output frequency? So, I think I have to suggest CDCM6208 , but its 8ch output. Cost is $5.2 at 1ku Would you please advise another solution? Don t you have smaller (2~4ch) output version of CDCM6208?
