Memory Types and Attributes for Efficient Code Execution

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Explore the different memory types such as normal, strongly ordered, and device memory, and their attributes like shareability, cacheability, bufferability, and more. Learn how these memory types impact code execution efficiency on microcontrollers.

  • Memory Types
  • Attributes
  • Code Execution
  • Shareability
  • Cacheability

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Presentation Transcript


  1. MEMORY TYPES MEMORY TYPES and and ATTRIBUTES ATTRIBUTES

  2. MEMORY TYPES in CORTEX M7 NORMAL MEMORY DEVICE MEMORY STRONGLY ORDERED MEMORY

  3. Normal memory is good for code execution It allows the speculative access No speculative access in strongly ordered and device memories CPU waits for the end of instruction before performing another one Each write needs to be visible for device, eg- external NAND Device memory is used for microcontroller Registers

  4. ATTRIBUTES SHAREABILITY CACHEABILITY BUFFERABLILITY EXECUTABLE NEVER (XN)

  5. SHAREABLE REGION Shareable Region means multiple masters can access the memory For example, CPU and DMA accessing some region Strongly ordered memory is always shareable If some area Is cacheable and shareable, Data cache can t be used Instruction cache can be used though

  6. EXAMPLE for SHAREABLE REGION Ethernet DMA Descriptors for Tx and Rx 256 Bytes of shareable region

  7. CACHEABLE REGION Where the cache can be used, i.e. instruction and data cache Should be disabled for synchronisation between 2 masters Will see more during the Cache policies

  8. Example for Disabling Cache Rx Buffer is at 0x20010000 DMA tries to copy data to RX Buffer Disable Cacheability for data synchronisation

  9. BUFFERABLE REGION Instruction execution may continue before memory write is done Memory write is then finished from a buffer

  10. EXECUTABLE NEVER (XN) Should be set where the instructions are not supposed to be executed from If the instruction is executed from XN region, it causes hardfault Speculative instruction fetch can be blocked

  11. Prevent Speculative access QSPI memory range QSPI set as flash Disabled instruction access

  12. Things to remember

  13. MPU configuration

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