Microprocessor & Assembly Language at University of Basrah: In-Depth Study
Explore the detailed study of Microprocessor & Assembly Language at University of Basrah, covering topics like General Architecture of Microcomputer system, Memory Units, Execution Unit, Bus Interface Unit, and Memory Organization. Gain insights into the hardware components, functional units, and data organization in microprocessors. Dive into the world of microcomputers with this comprehensive guide.
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2rd Grade Computer Science Dept/ College of Education for Pure Sciences Special Topics: Microprocessor & Assembly Language Instructor: Ghazwan Abdulnabi Al-Ali University of Basrah, Iraq
Microprocessor & Assembly Language University of Basrah General Architecture of Microcomputer system The hardware of Microcomputer system can be divided into four functional units: Input Unit Microprocessing Unit (MPU) Memory Unit Output Unit 1. 2. 3. 4. 2
Microprocessor & Assembly Language University of Basrah Memory Unit Internal Memory. used for storage to active information and programs (program to be executed and data under processing). ROM & RAM. External memory used for storage of non active data (long storage). CD & Disk drives 3
Microprocessor & Assembly Language University of Basrah Microprocessor EU (Execution Unit) (EU) Execution unit that responsible of executing instructions .. 1. Registers Small and fast memory that contains the data that is under process 2. ALU (Arithmetic and Logical Unit) Executing arithmetic and logical instructions And, OR, XOR, NOT 3. CU (Control Unit) 4
Microprocessor & Assembly Language University of Basrah Microprocessor BIU (Bus Interface Unit) BIU controls on Buses and transfers data between EU and memory and External I/0 devices. 1. Segment Register Segment registers are used to control memory addressing. 2. Instruction Point It is a register to indicate the next instruction to be executed 3. Instruction Queue Note// EU and BIU is parallel, but BIU keeps one step forward (when EU executes an instruction BIU brings another instruction from memory and put it in instruction queue). 5
Microprocessor & Assembly Language University of Basrah Memory address space and data organization is organized as bytes of data stored at consecutive addresses from 00000h to FFFFFh , these bytes can be independently accessed. the lower address byte is called the least significant byte and the higher address byte is called the most significant byte. 6
Microprocessor & Assembly Language University of Basrah 8 4 2 1 * * * * 1 1 1 1 8+4+2+1=15=F 8 4 2 1 0 1 1 0 0+4+2+0=6 7
Microprocessor & Assembly Language University of Basrah Registers Segment Registers 1. CS 2. DS 3. SS 4. ES Data Registers 1. AX 2. BX 3. CX 4. DX Indexing Registers 1. SI 2. BP Point Registers 1. SP 2. BP 3. IP 8
Microprocessor & Assembly Language University of Basrah Thank You 9
