Multikernel: A New OS Architecture for Scalable Multicore Systems
Explore the innovative Multikernel OS architecture designed for scalable multicore systems to address rising core counts, hardware diversity, and inter-core communication challenges. The design principles focus on explicit inter-core communication, hardware-neutral structure, and messaging transport mechanisms, enabling networking optimizations and resource management on heterogeneous cores.
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Presentation Transcript
The Multikernel: A new OS architecture for scalable multicore systems (2009) Andrew Baumann, Paul Barhamy, Pierre-Evariste Dagandz, Tim Harrisy, Rebecca Isaacsy, Simon Peter, Timothy Roscoe, Adrian Schu pbach, and Akhilesh Singhania Presented by Jibin Yuan EECS 582 F16 1
Background Hardware Core counts is rising Heterogeneous and hardware diversity EECS 582 F16 2
Background Hardware Diversity Core I3 AMD A6-6310 Core I7-3960X EECS 582 F16 3
Background Heterogeneous Cores EECS 582 F16 4
Background Hardware Core counts is rising Heterogeneous and hardware diversity Each generation of hardware requires many optimization efforts EECS 582 F16 5
Background Interconnection Single shared interconnection has been replaced by message-passing hardware Cache coherence becomes increasingly expensive Messages are getting easier EECS 582 F16 6
Background Share memory vs Message passing EECS 582 F16 7
Design Principles Explicit inter-core communication Hardware-neutral OS structure Replicated state instead of shared EECS 582 F16 8
Explicit Inter-core Communication All inter-core communication is performed using explicit messages Allows the OS to deploy networking optimizations Provides isolation and resource management on heterogeneous cores Support split-phase operations Naturally modular EECS 582 F16 9
Hardware Neutral Separate the OS as much as possible from the hardware Messaging transport mechanism and Interface to hardware Easy to deploying and upgrade Isolate the distributed communication algorithms Enable to binding of both the protocol implementation and message transport EECS 582 F16 10
Replicated State No shared memory leads to replicate state across cores Increasing system scalability by reducing load Data shared between cores that do not support the same page table format EECS 582 F16 11
Implementation Goal: Comparable performance Evidence of salability Extensive without refactoring Exploit the message-passing Exploit the modularity of the OS EECS 582 F16 12
Barrelfish System Structure CPU driver: each core as a privileged-mode Monitor: single-core, user-space processes and schedulable EECS 582 F16 13
Barrelfish Process Structure Collection of dispatcher objects Dispatchers are scheduled by the local CPU driver. Dispatcher runs a user-level thread scheduler Implements a threads package similar to standard POSIX threads EECS 582 F16 14
Barrelfish Inter-core Communication Communication through messages Uses cache-coherent memory currently User-level remote procedure call between cores EECS 582 F16 15
Barrelfish Memory Management Capability system All memory management is performed explicitly through system calls CPU driver is responsible for checking the correctness of operations VM management is performed by user-level code EECS 582 F16 16
Barrelfish Shared Address Space Share virtual address space by replicating hardware page tables Share capability supported by monitors Thread managed by thread scheduler EECS 582 F16 17
Barrelfish Knowledge and Policy Engine System knowledge base (SKB): Maintains knowledge of underlying hardware Allows the system to optimize the device drivers and etc. EECS 582 F16 18
About Barrelfish One way to implement a multikernel model Not optimal to separate CPU driver and monitor Proving ground for experimenting with multikernel system EECS 582 F16 19
Evaluation TLB Shootdown Messaging performance Compute-bound workloads IO workloads EECS 582 F16 20
Evaluation TLB Shootdown Linux and Windows: use IPIs for shootdown fast but disruptive Barrelfish: uses messages takes advantage of known hardware platforms Figure: Unmap latency on 8x4-core AMD EECS 582 F16 21
Summary Hardware diversity Goal and implementation of Barrelfish Evaluation EECS 582 F16 22
Discussion Can multi-kernel be a rack- or datacenter-scale OS? What is OS structure widely used in the multicores in the market? Characteristics of monolithic, microkernel, exokernel, multikernel EECS 582 F16 23
