Operation of a Basic Processor in Digital Systems

ECE 352 Digital System Fundamentals Operation of a Basic Processor Operation of a Basic Processor 1 1

Stored Program Computer For many systems, we want fixed control of the datapath Most circuits we have designed thus far However, we may want a more flexible machine Perform different computations by using different sequences of control words with a generic datapath Instructions Binary words containing datapath/control information Stored in memory Decoded into datapath control words to direct the datapath to perform the required operation A program is a sequence of instructions that are used to accomplish some task(s) Operation of a Basic Processor 2 2

Stored Program Computer The program is stored in memory, usually one instruction per memory location A program counter (PC) is a special register that holds the address of the next instruction The PC has counting logic, parallel load and other logic to permit changes in the instruction sequence The PC may be incremented (next instruction), or modified by certain instructions Branch, Jump, Return from Subroutine, etc. Flow control instructions may conditionally or unconditionally update the PC Can depend on datapath flag outputs: Branch if Zero Operation of a Basic Processor 3 3

Operation of Processor (approx.) Read the instruction at the memory address stored in the PC PC register contains the ADDRESS of the instruction Still need to fetch the instruction itself from memory Commonly referred to as fetching the instruction Based on the instruction, either Perform a calculation & store the result Update the PC (with or without condition) If the PC was not updated, increment it to point to the next instruction in memory Repeat Operation of a Basic Processor 4 4

ECE 352: Digital System Fundamentals ECE 352: Digital System Fundamentals DATA MEMORY CONTROL DATAPATH Example Simple Processor 02 5 5

An Instruction Generally a single micro-operation Each instruction is very simple compared to the complete program Compilers convert high-level language programs into long sequences of instructions Code like this actually represents many instructions: Operation of a Basic Processor if (A < B) C = D + E + F + G; else C = H * (J + K) / L; Some instructions (not all of them) also set single-bit flags that are used by other instructions Was the most recently calculated result zero? Was the most recently calculated result negative? 6 6

Instruction Formats Instructions divided into bit groups called fields Each field contains a specific instruction part Operation code (opcode) An n-bit opcode can specify up to 2n different operations Operand(s) Registers, Memory addresses, Constant data Operands may be specified implicitly as well An increment instruction implies a 1 as an operand The instruction type (indicated by the opcode) determines how other bits should be interpreted Don t memorize these Formats are specific to a processor type In this class we will give you the formats if you need them Operation of a Basic Processor 7 7

Instruction Formats: ALU Ops The opcode field determines what the actual register transfer operation will be Instruction includes destination register address and information about source operands First operand is a register, second is a register for some opcodes, but an immediate for others Immediate operands are data constants contained within the instruction Only 3 bits fit here, so must be sign-extended or zero-filled Clever encodings enable wider immediate values (this is beyond the scope of this class) Operation of a Basic Processor 8 8

Instruction Formats: Control Flow Changes in program flow caused by jump or branch instructions (affects only PC) Jump unconditionally loads the PC from source register A Branch conditionally adds a sign-extended 6-bit offset (AD) to PC Conditional branch is based on the state of a datapath flag value (i.e. Z, N, C, V) Operation of a Basic Processor 9 9

Instruction Specifications Part of the ISA Describe in detail each instruction the system can execute Operations, operands, flags set (if any) Operation of a Basic Processor A mnemonic is used by the programmer to represent the opcode in text An assembler then generates the actual binary instruction 10 10

Example Instruction Specification Operation of a Basic Processor 11 11

Executing Instructions The control unit fetches and decodes the instruction From that, it generates control signal values These values make the datapath do what the instruction indicates should happen Operation of a Basic Processor 12 12

Single-Cycle Hardwired Control Each instruction completed in a single cycle PC addresses instruction memory Value read from that address is sent to the instruction decoder In many processors, a special instruction register is used to hold the fetched instruction Instruction decoder provides the control word to the datapath Also determines how PC is updated PC updated each clock cycle Repeats indefinitely Operation of a Basic Processor 13 13

Control Word Several bits of the control word are related to flow control instructions PL: if 0, the PC increments, else updated based on JB JB: if 0, do conditional branch, else unconditional jump BC: if 0, do BRZ, else do BRN The concatenated offset field is sign-extended Allows for PC-relative addressing (go 2 words ahead, 3 words back, etc.) MW: if 1, will write to external memory The instruction s immediate field is zero-extended and sent to the datapath Operation of a Basic Processor 14 14

ECE 352: Digital System Fundamentals ECE 352: Digital System Fundamentals DATA MEMORY CONTROL DATAPATH Example Simple Processor 02 15 15

ECE 352 Digital System Fundamentals Operation of a Basic Processor Operation of a Basic Processor 16 16