Reactive Synthesis: Branching Logics and Parameterized Systems

Reactive Synthesis: Branching Logics and Parameterized Systems
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Reactive synthesis involves generating a system that satisfies a given specification in various logics, focusing on inputs, outputs, and granting requests. The research delves into the challenges, motivations, and solutions in the field, offering deeper insights into linear temporal logic, computation tree logic, and innovative approaches to system synthesis from complex languages.

  • Reactive Synthesis
  • Parameterized Systems
  • Logics
  • System Engineering
  • Research

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  1. Reactive synthesis: branching logics and parameterized systems Ayrat Khalimov PhD defense TU Graz, March 9, 2018 Rigorous Systems Engineering

  2. What is reactive synthesis? ? ? requirements programmer system A module with input r and output ?, and every request ? should be granted ? ? ? = {?},? = {?}, ?(? ? ?) ? ? ? ? ? 2

  3. Reactive synthesis problem Given: specification in some logic Output: system of some kind that satisfies We play with both ingredients: Part 1: logic Part 2: systems But what is the problem with the current? 3

  4. Motivation for my research in Part I Consider the previous example ?(? ? ?) ? ? ? In reality the synthesizer produces: Write better specifications, but keep the declarative nature ( what , not how ): - There should exista way to lower the grant 4

  5. Motivation for my research in Part II Use synthesis when writing specifications worth it In the arbiter example, what if there are 10 requests? 100? ?: ? ?? ? ?? ? ?:? ?? ?? parameterized synthesis: - find a block that can be cloned 5

  6. Thesis overview It is hard to write good specifications for synthesis. Part I studies synthesis from richerlanguages - Two new approaches for CTL* synthesis Part II studies synthesis of richer systems - New cutoffs and a case study 6

  7. Part I Approaches to CTL* synthesis 7

  8. What is Linear Temporal Logic (LTL)? A machine maps inputs to outputs ? ? ? ? ( ? ?)(??)(??)( ? ?) ? ? An LTL formula ??? describes infinite computations ?(? ??), ?(? ??), ?(? ?? ?), ??( ?) ??? (?) ?(? ??) 8

  9. What is Computation Tree Logic (CTL*)? A machine maps inputs to outputs ? ? ? ? ? ? CTL* can describe possibilities using ? and ? ????, ??(? ? ?), ???? ? ??? ???? ? 9

  10. Why CTL* is (not) useful? Recall the lazy arbiter that satisfies ??(? ??) ? ? ? To avoid lazy arbiters the designer can (automatically) add ??? ? or ???? ? CTL* is declarative Writing CTL* properties is hard 10

  11. Thesis contribution to CTL* synthesis Already known - Safra-full CTL* synthesis [62] New: - Bounded synthesis approach - Synthesis via reduction to LTL 11

  12. Bounded synthesis for LTL [46] Encode model checking into SMT - the query is satisfiable ??? Synthesis: replace system with the unknown - ???: sys ? LTL automaton ? return ???k SMT query ???? ?? return (unknown) ???? unrealizable for k 12

  13. Bounded synthesis for CTL* ????? ?????? ?? ?? ? ??? ? automata ????? ??? ? CTL return ???k SMT query ???? ?????? (unknown) ???? return unrealizable for k 13

  14. Bounded synthesis for CTL* + Finds smallest models + Flexible + Inherits progress in SMTs - Bad at establishing unrealizability - Requires additional development - SMTs are not very fast 14

  15. CTL* synthesis via LTL synthesis Synthesize proof along the models: - for each sub-formula ?? or ??, introduce new system output ??? or ??? - for each ??, introduce direction-output ??? that encodes system path that satisfies ? LTL formula says: - ? ??? ? - "? ??? ???? ? " (roughly) - The top-level proposition holds initially 15

  16. Example The top-level proposition holds initially ? ??? ? "? ??? ???? ? " (roughly) ???? = ?? ? ? ? , inputs={r}, outputs={g} inputs={r}, outputs={?,?,?} ????= ? ?(? ?? = ? ? ? ? ? ) ? ? = 0 ? = 1 16

  17. Properties of the reduction ??? is realizable ??? is realizable ??? 2| ??? | Yet the synthesis complexity stays in 2EXPTIME Systems can get larger Experiments: faster when the # of E-formulas is small 17

  18. Concluding Part I Two approaches to CTL* synthesis - bounded synthesis approach - reduction via LTL 18

  19. Part II Parameterized synthesis 19

  20. Distributed synthesis 20

  21. Distributed uniform synthesis 21

  22. Token rings 22

  23. Parameterized synthesis problem Given parameterized specification , find a process implementation P : ?:?? ? 23

  24. Why? # of clients Synthesis time of AMBA protocol 24

  25. Cutoffs in token rings [40,50] ?.?(?) ?,?: ?(?,?) ?.?(?,? + ?)

  26. Contributions in Part II Token ring architectures: - Optimizations of bounded synthesis modular cutoffs hub abstraction - AMBA case study cutoff extensions incremental property synthesis Guarded systems: - we significantly extended cutoffs of [37] 26

  27. Conclusion 1. Two new synthesis approaches for CTL*: - using bounded synthesis (flexible but slow) - by reducing to LTL synthesis (often faster) 2. New cutoffs and tricks for parameterized synthesis - token-rings: small cutoff extensions, efficient optimizations - guarded systems: new cutoffs Future work: - other reductions to LTL synthesis - synthesis with parameterized data 27

  28. Other works Decidability of parameterized verification, book Parameterized Model Checking of Token-Passing Systems Semi-Formal Methods for Soft Error Analysis 28

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