Understanding MIPS Instruction Formats and Examples

cse 341 n.w
1 / 23
Embed
Share

Dive into the world of MIPS Instruction Set Architecture (ISA) with a focus on machine language, particularly the I-type and J-type formats. Explore load/store, branch, and immediate instructions along with real-life examples. Learn about PC-relative addressing and the nuances of branch and jump instructions in the MIPS architecture.

  • MIPS Instruction Set
  • Machine Language
  • ISA Format
  • Load/Store Instruction
  • Branch Instruction

Uploaded on | 0 Views


Download Presentation

Please find below an Image/Link to download the presentation.

The content on the website is provided AS IS for your information and personal use only. It may not be sold, licensed, or shared on other websites without obtaining consent from the author. If you encounter any issues during the download, it is possible that the publisher has removed the file from their server.

You are allowed to download the files provided on this website for personal or commercial use, subject to the condition that they are used lawfully. All files are the property of their respective owners.

The content on the website is provided AS IS for your information and personal use only. It may not be sold, licensed, or shared on other websites without obtaining consent from the author.

E N D

Presentation Transcript


  1. CSE 341 Computer Organization Lecture 8 ISA : Machine Language 2 Prof. Lu Su Computer Science & Engineering 1

  2. I-type Format I-type format: designed for load/store, branch and immediate instruction. - rs: source register for load/store; for branch or immediate instruction, it is operand. - rt: for branches, it is source register; for other three cases, it is destination register - address: 16-bit, from (-32768)10to (32767)10 2

  3. Example for load lw $s1, 100($s2) 23hex 18 17 100 100011 10010 10001 00000 00001100100 3

  4. Example for store sw $s1, 100($s2) 4

  5. Example for store sw $s1, 100($s2) 2bhex 18 17 100 101011 10010 10001 00000 00001100100 5

  6. Example for addi addi $s1, $s2, 100 8hex 18 17 100 001000 10010 10001 00000 00001100100 6

  7. Branch For branch instruction, the last field (16-bit) is not address Since all the instructions are stored in the memory, the last field of branch instruction is the offset from the address of current instruction (program counter (PC)) to the address of the targeted instruction. PC-relative addressing:The MIPS address is actually relative to the address of the following instruction (PC+4) as opposed to the current instruction (PC). 7

  8. Example for branch Word Offset ! (not byte offset) 8

  9. J-type Format J-type format: jump instruction. Unlike branch instruction, the last field of jump instruction contains a word address instead of offset. A 26-bit address field allows jump to any address from 0 to 228. Word Address ! Byte Address ! 9

  10. Example for jump j 100 10

  11. Example for jump j 100 2hex 2510 000010 00000 00000 00000 00000 011001 11

  12. From Program to Computer Example 1 12

  13. From Program to Computer Example 2 13

  14. From Program to Computer Example 2 14

  15. MIPS Addressing Mode Summary Multiple forms of addressing are generically called addressing modes. The MIPS addressing modes are the following: 1. Immediate addressing 2. Register addressing 3. Base or displacement addressing 4. PC-relative addressing 5. Pseudodirect addressing 15

  16. Immediate Addressing The operand is a constant within the instruction itself 16

  17. Example for addi addi $s1, $s2, 100 8hex 18 17 100 001000 10010 10001 00000 00001100100 17

  18. Register Addressing The operand is a register 18

  19. Base or Displacement Addressing The operand is at the memory location 19

  20. Example for store sw $s1, 100($s2) 2bhex 18 17 100 101011 10010 10001 00000 00001100100 00000 10001000111 20

  21. PC-relative Addressing The branch address is the sum of the PC and a constant in the instruction. 21

  22. PseudodirectAddressing The jump address is the 26 bits of the instruction concatenated with the upper bits of the PC 22

  23. Short Summary Machine language: Binary representation of instr.: --The format in which the machine actually executes them MIPS machine language is designed to simplify processor implementation -- Fixed length instructions -- 3 instruction encodings: R-type, I-type, and J- type -- Common operations fit in one instruction -- Uncommon (e.g., long immediate) require more than one 23

Related


More Related Content