VOUT3 Signal Usage in DRA756 Infotainment Application Processor
This presentation delves into the usage of the VOUT3 signal in the design involving the DRA756 Infotainment application processor. It covers the current design implementation, proposed design changes, and SYSBOOT configuration details. Feedback is sought on the proposed design change and potential issues related to the presence of pull-up or pull-down resistors with the MAX9275 device. Dive into the slides to gain insights and provide valuable feedback.
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Presentation Transcript
VOUT3/SYSBOOT VOUT3/SYSBOOT signal Multiplexing Multiplexing Query in Query in DRA756 signal DRA756 BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
Query: Query: This presentation explains about the usage of VOUT3 signal which is used in our design using DRA756 Infotainment application processor Slide 3 explains about the current design implementation for the VOUT3/SYSBOOT signals. Slide 4 explains about the design change or proposed design for the VOUT3/SYSBOOT signals. Slide 5 has the table of SYSBOOT configuration in our design. Please go through the slides and give us feed back on the proposed design change. Do you foresee any issue with this implementation? BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
Current Current Design / EVM Design: Design / EVM Design: Following the reference design available, we have connected the VOUT3/SYSBOOT lines to the Bus Exchange switch (SN74CBTLV16212GR). Based on the select lines, initially SYSBOOT lines will be selected(default). We are not using GPMC in our design. After booting, using the select lines, VOUT3 bus will be selected. In our design, VOUT3 from Bus Exchange Switch is connected to data input ports(DIN) of MAX9275 Serializer device. 3.3V DRA756 SN74CBTLV16212GR 10K (BUS EXCHANGE SWITCH) SYSBOOT 10K 22 R VOUT3/ SYSBOOT MAX9275GTN/V+ (GMSL Serializer) VOUT3 DIN Bus select lines BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
Proposed Design change: Proposed Design change: As we have some placement constraints in our design, we are planning to remove the Bus Exchange Switch. After the removal the connections will be like shown in the figure. In our design, the VOUT3/SYSBOOT pins are connected to the data input ports of the MAX9275 device, do you foresee any issue because of the presence of 10K pullup or pulldown resistors during the normal operation? i.e. When the IO is configured for VOUT3 LCD interface. Please check the next slide for the SYSBOOT configuration of DRA756 in our design. DRA756 3.3V MAX9275GTN/V+ (GMSL Serializer) 10K 22 R VOUT3_D15/ SYSBOOT15 DIN23 22 R VOUT3_D14/ SYSBOOT14 DIN22 10K BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
SYSBOOT CONFIGURATION: SYSBOOT CONFIGURATION: Table shows the SYSBOOT configuration of DRA756 in our design. SYSBOOT. NO Configuration Comments SYSBOOT15 HIGH SYSBOOT14 LOW SYSBOOT13 LOW SYSBOOT12 LOW SYSBOOT11 LOW NOT used in design SYSBOOT10 LOW SYSBOOT9 LOW SYSBOOT8 HIGH SYSBOOT7 LOW Redundant boot offset SYSBOOT6 LOW SYSBOOT5 HIGH SYSBOOT4 LOW SYSBOOT3 LOW SYSBOOT2 HIGH SYSBOOT1 HIGH SYSBOOT0 HIGH BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
Thank you Thank you BLACK PEPPER TECHNOLOGIES BLACK PEPPER TECHNOLOGIES
