8085 Microprocessor Instructions and Operation Codes

8085 INSTRUCTIONS Dr R THILAK KUMAR

8085 INSTRUCTIONS An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The entire group of instructions called the instruction set, determines what functions the microprocessor can perform. The 8085 instructions can be classified into the following five functional categories; Data transfer (copy) operations Arithmetic operations Logical operations Branching operations and Machine control operations

OP-CODE & OPERAND An microprocessor to perform a given task on specified data. Each instruction has two parts one is the task to be performed called the operation code (op code) and the second is the data to be operated on called the operand. The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an internal register, a memory location or an 8-bit (16-bit) address. instruction is a command to the

The 8085 instruction set is classified into the following three groups according to word size or byte size. 1-byte instruction 2-byte instruction 3-byte instruction

One-byte instructions-format The one byte instruction has an opcode alone. i.e. the opcode and operand are in the same byte. One byte instruction : Example Task opcode operand Copy the contents MOV C,A of the accumulator In register C opcode binary code hex code 0100 1111 4FH

Two-byte instructions The two byte instruction has an opcode followed by an eight bit address or data. The first byte specifies the opcode and the second byte specifies the operand Two byte instruction : Example Task opcode operand Load an 8-bit data MVI A, 32 H byte in the accumulator opcode 8-bit address binary code hex code 0100 1111 3E first byte 0011 0010 32 second byte

Three byte instructions The three byte instruction has an opcode followed by 16-bit address or data. Three byte instruction: Example Task opcode operand Load contents of LDA 2050 H Of memory 2050H Into A Low byte data/add High byte data/add opcode binary code hex code 0011 1010 3A first byte 0100 0010 50 second byte 0010 0000 20 third byte

DATA TRANSFER OR COPY INSTRUCTIONS One of the primary functions of the microprocessor is copying data, from a register (or I/O or memory) called the source, to another register (or I/O or memory) called the destination. The contents of the source are not transferred, but are copied into the destination register without modifying the contents of the source. Several instructions are used to copy data. This section is concerned with the following operations. MOV MVI OUT : move : move immediate : output to port copy a data byte load a data byte directly send a data byte to the output device read a data byte from an input device IN : input from port

The data transfer instructions move data between registers or between memory and registers. MOV - Move MVI - Move Immediate LDA - Load Accumulator Directly from Memory STA - Store Accumulator Directly in Memory LHLD - Load H & L Registers Directly from Memory SHLD - Store H & L Registers Directly in Memory An 'X' in the name of a data transfer instruction implies that it deals with a register pair (16-bits); LXI - Load Register Pair with Immediate data LDAX - Load Accumulator from Address in Register Pair STAX - Store Accumulator in Address in Register Pair XCHG - Exchange H & L with D & E XTHL - Exchange Top of Stack with H & L

MOV RD, RS The content of source register (Rs) is copied to destination register (Rd). The registers Rd and Rs can be any one of the general purpose registers A,B,C,D,E,H and L. No flags are affected. The previous contents of the destination are replaced by the contents of the source. BEFORE EXECUTION AFTER EXECUTION A 20 B MOV B,A A 20 B 20

MOV Rd, M (Rd) (M) The contents of memory (M) addressed by HL pair is moved to destination register (Rd). The register Rd can be any one of the general purpose registers A,B,C,D,E,H and L. No flags are affected. BEFORE EXECUTION AFTER EXECUTION A B D H F C E L A B D H F C E L 40 MOV C,M 20 50 40 20 50

MOV M, Rs (M) (Rs) The contents of source register is moved to the memory location addressed by HL pair. The register Rs can be any one of the general purpose registers A,B,C,D,E,H and L. No flags are affected. BEFORE EXECUTION AFTER EXECUTION A B D H F C E L A B D H F C E L 40 MOV M,B 20 50 20 50 40

MVI Rd, d8 (Rd) d8 The 8-bit data (d8) given in the instruction is moved to destination register (Rd). The register Rd can be any one of the general purpose registers A,B,C,D,E,H and L. No flags are affected. BEFORE EXECUTION AFTER EXECUTION A B D H F C E L A B D H F C E L 60 MVI B,60H 20 50

LDA addr 16 (A) (M) The content of the memory location whose address is given in the instruction is moved to accumulator. No flags are affected. BEFORE EXECUTION LDA 2050H AFTER EXECUTION A A 30 2050 30 2050 30

ARITHMETIC INSTRUCTIONS The 8085 microprocessor performs various arithmetic operations such as addition, subtraction, increment and decrement. These arithmetic operations have the following mnemonics. ADD : add add the contents of a register ADI : add immediate SUB : subtract SUI : subtract immediate subtract 8-bit data INR : increment DCR : decrement decreases the contents of add 8-bit data subtract the contents of a register increases the contents of register by 1 register by 1

ADDITION Any 8-bit number or the contents of register or the contents of memory location can be added to the contents of accumulator. The result (sum) is stored in the accumulator No two other 8-bit registers can be added directly Example : The contents of register B cannot be added directly to the contents of register C

OPCODEOPERANDDESCRIPTION ADD R M Add register or memory to accumulator The contents of register or memory are added to the contents of accumulator The result is stored in accumulator If the operand is memory location, its address is specified by HL Pair Example: ADD C or ADD M

BEFORE EXECUTION AFTER EXECUTION A B D H 04 A B D H 10 C E L 06 ADD C A= A+C C E L 06 04+06 =10 BEFORE EXECUTION AFTER EXECUTION A B D H 04 A B D H 14 C E ADD M A= A+M C E L 06 20 L 50 10 2050 10 2050

2. ADI Rd, d8 The 8-bit data (d8) given in the instruction is added to the content of A-register (accumulator). After addition the result is stored in accumulator. All flags are affected. 3. ADD M (A) The content of memory addressed by HL pair is added to the content of A-register. After addition the result is stored in accumulator. All flags are affected. 4. SUB reg (A) The content of the register is subtracted from the content of accumulator (A). After subtraction the result is stored in accumulator. All flags are affected. The register can be any one of the general purpose register A,B,C,D,E,H and L. (A) (A) + d8 (A) + (M) (A) - (reg)

EXAMPLE ADD M (A) (A)+(M) Or (A) (A) + ((HL)) Before Execution After Execution ADDITION A 44 HL MEMORY A HL MEMORY COOA 73 COOA 14 COOB 27 COOC COOD COOE 44H 0100 0100 73H 0111 0011 B7 COOA 73 COOA 14 COOB 27 COOC COOD COOE CF PF AF ZF SF 0 0 0 0 0 CF PF AF ZF SF 0 1 0 0 1 1011 0111 SUM CARRY B7 0

ARITHMETIC INSTRUCTIONS INSTRUCTION OPERATION INSTRUCTION OPERATION INSTRUCTION OPERATION ADD R A A+R ADC R A A+R+CY INR R R R+1 ADD M A A+M ADC M A A+M+CY INR M M M+1 ADI 8 Bit Data A A+M ADC 8 Bit Data A A+8+CY DCR R R R-1 SUB R A A-R SBB R A A-R-CY DCR M M M-1 SUB M A A- M SBB N A A- M-CY INX RP RP RP+1 SUI 8 Bit Data A A- 8 bit SBI A A- 8 bit-CY DCX RP RP RP+1 DAD Rp HL HL+Rp

LOGICAL OPERATIONS A microprocessor is basically a programmable logic chip. It can perform all the logic functions of the hard-wired logic through its instruction set. The 8085 instruction set includes such logic functions as AND, OR, EX-OR and NOT (complement). The opcodes of these operation are as follows. ANA : AND logically AND the contents of a register ANI : AND immediate logically AND 8-bit data ORA : OR logically OR the contents of register ORI : OR immediate logically OR 8-bit data XRA : X-OR exclusive-OR the contents of register XRI : X-OR immediate exclusive-OR 8-bit data All logic operations are performed in relation to the contents of the accumulator. The logic instruction reset the CY flag. The instruction CMA (complement accumulator) is an exception, it does not affect any flags. It places the result in the accumulator.

INSTRUCTION ANA R ANA M ANI 8 Bit data ORA R ORA M ORI Bit Data XRA R XRA M XRI 8 Bit Data OPERATION A A&R A A&M A A & 8 bit A A R A A M A A 8 bit A A ^ R A A ^ M A A ^8 bit

COMPARE, ROTATEINSTRUCTIONS INSTRUCTION CMP R CMP M CPI 8 Bit data RLC RRC RAL RAR OPERATION A-R A-M A- 8 bit data

CMP R The status of carry and zero flag after comparison are given below i) If (A) < (Reg) then the carry flag is set (CF=1) ii) If (A) > (Reg) then the carry flag is reset or cleared (CF=0) Iii) If (A) = (Reg) then the zero flag is set (ZF=1)

COMPAREREGISTER The content of the B-Register is compared with accumulator. The comparison is performed by subtracting the content of the B-Register from the content of the accumulator. The subtraction is performed in the ALU and the result is used to modify the flags and then discarded. The content of the accumulator and the B-Register are not altered

COMPARE REGISTER Before Execution After Execution A 15 B C2 A 15 B C2 1100 0010 C2 0011 1101 1' 0011 1110 2' CF 0 0001 0101 CF 1 PF 0 0011 1110 ADD PF 1 AF 0 0101 0011 5 3 AF 1 ZF SF 0 0 ZF SF 0 0 cc 1

COMPAREMEMORY The content of the memory addressed by HL pair is compared with accumulator. The comparison is performed by subtracting the content of the B- Register from the content of the accumulator. The subtraction is performed in the ALU and the result is used to modify the flags and then discarded. The content of the accumulator and the memory are not altered. All flags are affected by this instruction.

CMP M The status of carry and zero flag after comparison are given below i) If (A) < (M) then the carry flag is set (CF=1) ii) If (A) > (M) then the carry flag is reset or cleared (CF=0) Iii) If (A) = (M) then the zero flag is set (ZF=1)

Before Execution A 25 After Execution A 15 HL C050 HL C050 0111 1010 7A 1000 0101 1' MEMORY 1000 0110 2' 7A CO50 10 C051 0010 0101 25 CF 0 CF 1 1000 0110 ADD PF 0 PF 0 1010 1011 A B AF 0 AF 0 ZF 0 ZF 0 cc 1 SF 0 SF 1

CPID8 The 8-bit data given in the instruction is compared with accumulator. The comparison is performed by subtracting the content of the B- Register from the content of the accumulator. The subtraction is performed in the ALU and the result is used to modify the flags and then discarded. The content of the accumulator and the memory are not altered. All flags are affected by this instruction.

CPID8 The status of carry and zero flag after comparison are given below i) If (A) < (d8) then the carry flag is set (CF=1) ii) If (A) > (d8) then the carry flag is reset or cleared (CF=0) Iii) If (A) = (d8) then the zero flag is set (ZF=1)

RLCINSTRUCTIONS

RRCINSTRUCTIONS

RALINSTRUCTIONS

RARINSTRUCTIONS

OTHERINSTRUCTIONS CMA (Complement accumulator) The content of the accumulator is complemented. No flags are affected. STC (Set Carry) The carry flag is set to 1. Only carry flag is affected by this instruction CMC (Complement carry) The carry flag is complemented. Only the carry flag is affect this instruction.