Analysis and Synthesis of Integrated Analog Circuits Insights

Very basic rules to facilitate analysis / synthesis of integrated analog circuits In these slides: 1. How to obtain the large signal equation of p-type transistors from n-type ones and a few intuitive views about both. 2. Basic expressions for the resistances seen from each terminal in notable single-transistor configurations. 3. The gmrd(gmroin BJTs) product 4. Power rails, floating rails and reference nodes P. Bruschi Microelectronic System Design 1

1.From n-type transistors to p-type ones We will start from MOSFETs and, at last, will briefly cite the case of BJTs. These considerations apply to the large signal behavior, since the small-signal equivalent circuits of n-type and p-type transistors are identical. P. Bruschi Microelectronic System Design 2

From n-MOSFETs to p-MOSFETS Apply this transformation: ( ) V V DSAT V V DSAT V DS V DS ( ) ( I ) V V GS tn I GS tp D D 0 V V V 0 V V V I DS DS 0 0 And put it into the n-MOS equations: GS tp GS tn 0 0 I D D Obtain the correct p-MOS equations! P. Bruschi Microelectronic System Design 3

Useful examples: transition between triode and saturation region V DSAT V = DS 100 mV (weak inversion) (strong inversion) GS tn V V N-MOS DSAT V Applying the transformation (considering also VDSAT VDSAT V DSAT V P-MOS DS 100 mV (weak inversion) (strong inversion) GS tn V V = DSAT V ( ) P. Bruschi Microelectronic System Design 4

Again on the triode-saturation transition: Strong Inversion N-MOSFET in Strong Inversion Condition to keep the MOSFET in saturation V V V V V V V V DS GS tn D S G S tn Practical Rule V V V In order to keep an N-MOSFET in saturation VDcannot descend below the gate voltage (VG) reduced by Vtn D G tn VD saturation VG VG-Vtn This picture represents a drain voltage that progressively decreases while the gate voltage is constant triode P. Bruschi Microelectronic System Design 5

Again on the triode-saturation transition: Strong Inversion P-MOSFET in Strong Inversion Condition to keep the MOSFET in saturation ( ) ( ) V V V V V V V V V DS GS tp DS GS tp D G tp = 0 V V V Enhancement P-MOSFET tp tp tp + V V V triode D G tp VG+|Vtp| In order to keep a P-MOSFET in saturation VDcannot rise over the gate voltage (VG) increased by |Vtp| VG saturation VD P. Bruschi Microelectronic System Design 6

The "natural" direction of the current in P-type transistors I I D D This is equivalent to reverse the conventional direction of the drain current for P.MOSFETs By this convention, the drain current is positive also in P-MOSFETs P. Bruschi Microelectronic System Design 7

An intuitive view to deal with p-MOSFETs always ( ) = ( ) 0 V V V = V V V V 0 V V DS DS DS GS tp GS tp GS tp = in strong and moderate inversion 0 V V V tp tp tp 0 0 V V V V The voltage drop across the mosfet, measured along the natural direction of ID is |VDS| GS tp GS tp in strong inversion for enhancement p-MOSFETs Passing from the gate to the source the voltage is increased by |VGS| P. Bruschi Microelectronic System Design 8

From NPN BJTs to PNP ones Transformations ( ) V V I I V V I I CESAT V CESAT V CE CE BE BE These two can be avoided if the opposite convention for the current direction is used IB C C IC B B P. Bruschi Microelectronic System Design 9

2. Notable case of small signal resistances In order to simplify the analysis of circuits including a large number of devices, it is important to keep in mind simple expressions of the resistances that are seen from one terminal of a transistor to gnd in different configurations. In the next slides, cases of great importance for the synthesis of electronic circuits are recalled. The expressions may be complicated, and it is important to remember only the simplified forms and the broad conditions for which the approximations hold true P. Bruschi Microelectronic System Design 10

The six basic (small signal) resistances: MOSFETS (for simplicity, body effect is neglected in these formulas) 1 g r 1 v m ( ) = + + 1 r R r g R 2 v S d m S + R r =1 r D d exact result 1 g 1 g 1 v + g r = / / r r m d 3 v D Conditions for approximation m m 1 g Diode-connected MOSFET 1 and g r R r r 1 m d D d v m P. Bruschi Microelectronic System Design 11

The six basic (small signal) resistances: BJTs h r fe = b + e g g meq m + R r R r B b e B b e = h m be g r fe 1 1 g 1 = / / / / r r r g 6 v o be v r m m 4 g exact result meq ( 1 )// ) = + + + r R ( r g R exact result 5 v Eeq R o meq Eeq + R + r ( ) = approximations R r R = + // C o r r r R Eeq B be E 4 v be B 1 g meq o ( ( ) ( ( ) ) Conditions for approximation + + 1) 1 R r R r r g R 5 E be B v o meq E 1 ( ) ) + 1 , , << g r R r R r + + 2) 1 R r R r r h C meq o o B be g 5 E be B v o fe meq P. Bruschi Microelectronic System Design 12

Classification of resistances in analog circuits g r g r m d m d Small Medium- large - Large Very large (gmrd)rd MOSFETs 1/gm rd BJTs 1/gm rbe(hie) r0 hfero P. Bruschi Microelectronic System Design 13

3. The gmrdproduct in MOSFETs (gmroin BJTs) The gmrdproduct in MOSFETs and JFETs, or the equivalent gmroproduct in BJT, plays an important role in many circuit configurations. For example, this product appears in the voltage gain expression of most topologies used to design high-gain amplifier stages. A large gmrdproduct is also beneficial for the output resistance of high-performance current sources. In the next slides we will consider which are the factors that affect the gmrd(gmro) product. P. Bruschi Microelectronic System Design 14

The gmrdproduct (in saturation region) I = g D m V 1 1 TE = g r m d V 1 1 1 I TE = = = r d g I ds D D 1 L eff Large gmrdproducts are obtained for small VGS-Vtand large L As a broad estimate, gmrdcan be considered to be of the order of 100 P. Bruschi Microelectronic System Design 15

gmr0for BJTs in active zone I V = C g This result is correct in the IC region where the exponential ICvs. VBEdependence holds (see the Gummel Plot) m V V T = g r A 0 m V I = r A T o C gmr0may easily reach 1000 (e.g. for VA=25 V) gmr0does not depend on the BJT operating point (this is an important difference between BJT and MOSFETS) In general, the performance of BJT integrated circuits is affected by less degrees of freedom (DOFs) than CMOS ones. One of the reason is that, for a given temperature the gm/ICratio is a constant (=1/VT). If there is the need to change this ratio, emitter degeneration is the simplest choice. P. Bruschi Microelectronic System Design 16

Emitter degeneration (source degeneration) Lower effective gmfor the same ID(IC) Higher equivalent ro Higher input resistance (BJT) g g g g R = m g m g reduced gm mrid mrid + + 1 R 1 m E m S 1 1 g R g 1 1 g R g = mrid I mrid I + 1 V + 1 V voltage drop across REin the operating point D TE m S D T m E I R I R = D V S g R = C V E g R m S m E TE T P. Bruschi Microelectronic System Design 17

4. Power rails and floating rails 16 V High voltage domain 3.3 V 0 V Low voltage domain -16 V If the currents that the floating rail provides to the circuits connected to it (U1 and U2) are too large, the voltage of the floating rail can be altered. In that case it is necessary to use an active circuit (e.g a voltage buffer) to create the floating rail. Each power rail is connected to one of terminal of the power supply. Power rails carry the supply currents to all blocks of the IC P. Bruschi Microelectronic System Design 18

Reference node for voltages: power supply invariance Output voltage of circuit A, referred to Vdd (complementary to VoA) Input voltage of circuit B, referred to Vdd = oA c V V V dd oA = iB c V V V dd iB Output voltage of circuit A, referred to gnd Input voltage of circuit B, referred to gnd P. Bruschi Microelectronic System Design 19

Invariance of input and output voltages with respect to supply voltage Depending on the topology of a given block (A) Input. 1) The real input signal is Vi 2) The real input signal is Vi-C (The internal currents and output voltages do not vary if the real input is constant even if Vddvaries) Output. For a constant input voltage: 1) Vois independent of Vdd 2) Vo-Cis independent of Vdd P. Bruschi Microelectronic System Design 20

Example: n-MOS common source amplifier with resistive load (unipolar) = = = = ( ( ) V V V V RI RI V V Rf V Rf V 1 1 1 o DD D DD GS ) 1 1 1 o DD = D DD Rf V i = ( ) I f V = ( ) V RI 1 1 D i 1 1 1 o c D i Invariant When referred to the gnd rail, the output voltage of this amplifier is not invariant with respect to the the power supply voltage (Vdd). Non-Invariant On the other hand, the complementary voltage Vo1-cis invariant with respect to the supply voltage. P. Bruschi Microelectronic System Design 21

Example: cascade of two n-mos common source stages = = ( ) V V V Rf V 2 1 1 i o DD i = = ( ) ( ) I f V f V Rf V 2 2 1 D GS DD i Vout ID2(and then Vout) is strongly dependent on Vdd. This means a very low PSSR. For large Vddvariations, the operating point of M2 can be altered in an not acceptable extent. wrong configuration! P. Bruschi Microelectronic System Design 22

Example: cascade of two complementary common source amplifiers N-stage P-stage = = ( ) ( ) I f V f Rf V 2 2 1 D GS i The N-stage: requires an input voltage (Vi1) that is invariant when referred to gnd. Produces a voltage that is invariant when referred to Vdd The P-stage: requires an input voltage (Vi1) that is invariant when referred to Vdd. Produces a voltage that is invariant when referred to gnd correct configuration! P-type and N-stages can be cascaded with low sensitivity to Vdd (high PSSR) P. Bruschi Microelectronic System Design 23