Design and Architecture of Computer Systems Overview
This content provides an overview of the Instruction Set Architecture (ISA) and Microarchitecture in computer systems. It explains the difference between ISA and Microarchitecture, details the components of ISA such as Instructions, Opcodes, and Memory, and delves into Microarchitecture implementation aspects including pipelining and caching. The property differences between ISA and Microarchitecture are explored, along with design considerations impacting both aspects. The MIPS ISA is also briefly discussed.
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Presentation Transcript
CS161 Design and Architecture of Computer Systems ISA Overview
ISA vs. Microarchitecture ISA Agreed upon interface between software and hardware SW/compiler assumes, HW promises What the software writer needs to know to write and debug system/user programs Microarchitecture Specific implementation of an ISA Not visible to the software Microprocessor ISA, uarch, circuits Architecture = ISA + microarchitecture Problem Algorithm Program ISA Microarchitecture Circuits Electrons
ISA Instructions Opcodes, Addressing Modes, Data Types Instruction Types and Formats Registers, Condition Codes Memory Address space, Addressability, Alignment Virtual memory management I/O: memory-mapped vs. instr.
Microarchitecture Implementation of the ISA under specific design constraints and goals Anything done in hardware without exposure to software Pipelining In-order versus out-of-order instruction execution Memory access scheduling policy Superscalar processing (multiple instruction issue?) Caching? Levels, size, associativity, replacement policy Prefetching?
Property of ISA vs. Uarch? ADD instruction s opcode Number of general purpose registers Number of ports to the register file Number of cycles to execute the MUL instruction Remember Microarchitecture: Implementation of the ISA under specific design constraints and goals
Design Point A set of design considerations and their importance leads to tradeoffs in both ISA and uarch Problem Considerations Cost Performance Maximum power consumption Energy consumption (battery life) Reliability and Correctness Algorithm Program ISA Microarchitecture Circuits Electrons Design point determined by the Problem space (application space), the intended users/market
MIPS ISA 7
MIPS arithmetic All instructions have 3 operands Operand order is fixed (destination first) Example: C code: a = b + c The natural number of operands for an operation like addition is three requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple MIPS code : add a, b, c
MIPS arithmetic Design Principle: simplicity favors regularity. Of course this complicates some things... C code: a = b + c + d; MIPS code: add a, b, c add a, a, d Operands must be registers, only 32 registers provided Each register contains 32 bits Design Principle: smaller is faster. Why?
MIPS Instructions Format R-type 0 6-bit rs 5-bit rt 5-bit rd 5-bit shamt 5-bit funct 6-bit I-type opcode 6-bit rs 5-bit rt 5-bit immediate 16-bit J-type opcode 6-bit immediate 26-bit
